SY89113UMY-TR

SY89113UMY-TR is a 2.5V low jitter, low skew, 1:12 LVDS fanout buffer with 2:1 input MUX and internal termination optimized for precision telecom and enterprise server distribution applications. Unlike other multiplexers, this input includes a unique isolation design that minimizes channel-to-channel crosstalk. This distributes clock frequencies from DC to <gt/>1GHz guaranteed over temperature and voltage. It incorporates a synchronous output enable (EN) so that the outputs will only be enabled/disabled when they are already in the LOW state. CLK0 differential input includes Micrel's unique, 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVPP) without any level shifting or termination resistor networks in the signal path. Application includes multi-processor server, SONET/SDH clock/data distribution, fibre channel distribution, gigabit Ethernet clock distribution.

• Selects between 1 of 2 inputs, and provides 12 precision, low skew LVDS output copies
• Guaranteed AC performance over temperature and voltage
• CLK1 accepts virtually any logic standard
• TTL/CMOS (including 3.3V logic), LVPECL single-ended
• LVPECL, LVDS, CML, HSTL differential
• 325mV LVDS-compatible output swing
• 2.375 to 2.625V power supply range (TA = -40°C to +85°C)
• 1.125 to 1.275V output common mode voltage range (VCC = +2.5V ±5%, TA = -40°C to +85°C)
• 1GHz maximum operating frequency minimum (VOUT ≥ 200mV, TA = –40°C to + 85°C)
• 44 lead QFN package, industrial temperature range from -40 to 85°C