S25FL127SABMFB100

S25FL127SABMFB100 is a FL-S flash non-volatile memory using MIRRORBIT™ technology - that stores two data bits in each memory array transistor, eclipse architecture - that dramatically improves program and erase performance, 65-nm process lithography. This multiple width interface is called SPI multi-I/O or MIO. The Eclipse architecture features a page programming buffer that allows up to 128 words (256bytes) or 256 words (512bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. Executing code directly from flash memory is often called eXecute-in-Place (XIP). It t offers a high density coupled with the flexibility and fast performance required by a variety of embedded applications. It is ideal for code shadowing, XIP, and data storage.

• 128Mb density, 0.065µm MIRRORBIT™ process technology device technology
• 108MHz speed, 8-pin SO package
• Industrial temperature range from -40 to +105°C (automotive, AEC-Q100 grade 2)
• SPI with multi-I/O, SPI clock polarity and phase modes 0 and 3
• Multi I/O command set and footprint compatible with S25FL-P SPI family
• Normal, fast, dual, quad, common flash interface data for configuration information
• Quad-input page programming (QPP) for slow clock systems
• Automatic ECC -internal hardware error correction code generation with single bit error correction
• 100000 program-erase cycles per sector, minimum cycling endurance
• 20 year data retention, minimum, one-time programmable array of 1024bytes