TSB41AB3PFP

The TSB41AB3PFP is a Digital and Analogue Transceiver functions required to implement a three-port node in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The transceiver includes circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration and for packet reception and transmission. The TSB41AB3 is designed to interface with a line layer controller (LLC), such as the TSB12LV21, TSB12LV22, TSB12LV23, TSB12LV26, TSB12LV31, TSB12LV41, TSB12LV42 or TSB12LV01A. The TSB41AB3 requires only an external 24.576MHz crystal as a reference. An external clock may be used instead of a crystal. An internal oscillator drives an internal phase-locked loop (PLL), which generates the required 393.216MHz reference signal. This reference signal is internally divided to provide the clock signals used to control transmission of the outbound encoded strobe and data information.

• Fully interoperable with FireWire™ and i.LINK™ implementation of IEEE standard 1394
• Fully compliant with OpenHCI requirements
• Provides three 1394a-2000 fully-compliant cable port at 400Mbps
• Extended resume signalling for compatibility with legacy DV devices
• Power-down features to conserve energy in battery-powered applications
• Ultra-low power sleep mode
• Node power class information signalling for system power management
• Cable power presence monitoring
• Cable ports monitor line conditions for active connection to remote node
• Data interface to link-layer controller through 2/4/8 parallel lines at 49.152MHz
• Interoperable with link-layer controllers using 3.3 and 5V supplies
• Separate cable bias (TPBIAS) for each port
• Software device reset (SWR)
• Green product and no Sb/Br