FDG6301N

The FDG6301N is a dual N-channel logic level enhancement-mode Digital FET with high cell density and DMOS technology. This very high density process is especially tailored to minimize ON-state resistance. It has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signals MOSFETs.

• Very low level gate drive requirements allowing direct operation in 3V circuits (VGS (th) <lt/>1.5V)
• Gate-source Zener for ESD ruggedness (<gt/>6kV human body model)
• Compact industry standard surface-mount-package