S25FL512SAGBHIA10

S25FL512SAGBHIA10 is a 512Mb serial peripheral interface (SPI) flash memory. This device connects to a host system via an SPI. Traditional SPI single-bit serial input and output (Single I/O or SIO) is supported as well as optional two-bit (Dual I/O or DIO) and four-bit (Quad I/O or QIO) serial commands. This multiple-width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for double data rate (DDR) read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock. The eclipse architecture features a page programming buffer that allows up to 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI programs or erase algorithms. It offers high densities coupled with the flexibility and fast performance required by a variety of embedded applications. It is ideal for code shadowing, XIP, and data storage.

• 65nm MIRRORBIT™ process technology, 133MHz speed
• Multi I/O command set and footprint compatible with the S25FL-P SPI family
• Common flash interface (CFI) data for configuration information
• 512-byte page programming buffer, quad-input page programming (QPP) for slow clock systems
• Automatic ECC -internal hardware error correction code generation with single bit error correction
• 100,000 minimum program-erase cycles, 20-year minimum data retention
• Status register bits to control protection against program or erase of a contiguous range of sectors
• Individual sector protection controlled by boot code or password
• I/O supply voltage range from 1.65V to 3.6V
• Industrial temperature range from -40°C to + 85°C, 24-ball BGA package