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| 数量 | 价钱 (含税) |
|---|---|
| 1+ | CNY54.590 (CNY61.6867) |
| 10+ | CNY53.070 (CNY59.9691) |
| 25+ | CNY52.620 (CNY59.4606) |
| 50+ | CNY52.170 (CNY58.9521) |
| 100+ | CNY51.710 (CNY58.4323) |
| 250+ | CNY45.580 (CNY51.5054) |
| 500+ | CNY40.470 (CNY45.7311) |
产品信息
产品概述
CY7C1020DV33-10ZSXI is a CY7C1020DV33 high-performance CMOS static RAM organized as 32,768 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs low. If byte low enable (BLE) is low, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A14). If byte high enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A14). Reading from the device is accomplished by taking chip enable active-low (CE) and output enable (OE) low while forcing the write enable (WE) high. If byte low enable (BLE) is low, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If byte high enable (BHE) is low, then data from memory will appear on I/O8 to I/O15.
- Pin-and function-compatible with CY7C1020CV33
- High speed is tAA = 10ns
- Low active power, ICC = 60mA at 10ns
- Low CMOS standby power, ISB2 = 3mA
- 2.0V data retention
- Automatic power-down when deselected
- CMOS for optimum speed/power
- Independent control of upper and lower bits
- 44-pin TSOP Type II package
- Industrial temperature range from –40°C to +85°C
技术规格
异步SRAM
512Kbit
3V 至 3.6V
TSOP
44引脚
3V
3.3V
表面安装
85°C
-
512Kbit
32K x 16位
32K x 16位
TSOP
10ns
3.6V
-
-40°C
-
No SVHC (25-Jun-2025)
法律与环境
进行最后一道重要生产流程所在的地区原产地:Philippines
进行最后一道重要生产流程所在的地区
RoHS
RoHS
产品合规证书
