CY62167G30-45BVXI

CY62167G30-45BVXI is a high-performance CMOS, low-power (MoBL®) SRAM device with embedded ECC[2]. To access devices with a single chip enable input, assert the chip enable (active low CE) input LOW. To access dual chip enable devices, assert both chip enable inputs – active low CE1 as LOW and CE2 as HIGH. To perform data writes, assert the Write Enable (active low WE) input LOW, and provide the data and address on the device data pins (I/O0 through I/O15) and address pins (A0 through A19) respectively. The byte high enable (active low BHE) and byte low enable (active low BLE) inputs control byte writes and writes data on the corresponding I/O lines to the memory location specified. Active low BHE controls I/O8 through I/O15 and active low BLE controls I/O0 through I/O7. To perform data reads, assert the Output Enable (active low OE) input and provide the required address on the address lines.

• Embedded error-correcting code (ECC) for single-bit error correction
• Transistor-transistor logic (TTL) compatible inputs and outputs
• Error indication (ERR) pin to indicate 1-bit error detection and correction
• Operating voltage range from 2.2V to 3.6V
• VCC for data retention is 1.0V minimum, data retention current is 8.0µA max (2.2V <lt/> VCC <lt/> 3.6V)
• Operation recovery time is 45ns minimum
• Input capacitance is 10pF maximum ( TA = 25 °C, f = 1 MHz, VCC = VCC(typ))
• Output capacitance is 10pF maximum ( TA = 25 °C, f = 1 MHz, VCC = VCC(typ))
• Output leakage current range from -1.0 to +1.0µA ( GND <lt/> VOUT <lt/> VCC, Output disabled)
• 48-ball VFBGA package, industrial temperature range from -40°C to +85°C