CY62128ELL-55SXE

CY62128ELL-55SXE is a high-performance CMOS static RAM organized as 128K words by 8 bits. This device features an advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL®) in portable applications. The device also has an automatic power-down feature that significantly reduces power consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (active low CE1 HIGH or CE2 LOW). The eight input and output pins (I/O0 through I/O7) are placed in a high impedance state when the device is deselected (active low CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a write operation is in progress (active low CE1 LOW and CE2 HIGH and WE LOW). To write to the device, take Chip Enable (active low CE1 LOW and CE2 HIGH) and Write Enable (active low WE) inputs LOW.

• Complementary metal oxide semiconductor (CMOS) for optimum speed and power
• VCC range from 4.5 to 5.5V, read cycle time is 55ns min, write cycle time is 55ns min
• Power dissipation is 1.3mA typical (f = 1MHz), standby ISB2 is 1µA typical
• Input capacitance is 10pF max (TA = 25°C, f = 1MHz, VCC = VCC(typ))
• Output capacitance is 10pF max (TA = 25°C, f = 1MHz, VCC = VCC(typ))
• Input leakage current range from -4 to +4µA (55ns, automotive-E)
• VCC for data retention is 2V minimum
• Data retention current is 30µA max (VCC = VDR, VIN > VCC – 0.2V or VIN < 0.2V)
• Operation recovery time is 55ns minimum
• 32-pin 450-Mil SOIC package, industrial temperature range from -40°C to +85°C