LMK00804BPW

The LMK00804BPW is a high-performance clock Fan-out Buffer which can distribute up to four LVCMOS/LVTTL outputs from one of two selectable inputs, which can accept differential or single-ended inputs. The clock enable input is synchronized internally to eliminate runt or glitch pulses on the outputs when the clock enable terminal is asserted or de-asserted. The outputs are held in logic low state when the clock is disabled. A separate output enables terminal controls whether the outputs are active state or high-impedance state. The low additive jitter and phase noise floor and guaranteed output and part-to-part skew characteristics make the LMK00804B ideal for applications demanding high performance and repeatability.

• Four LVCMOS/LVTTL outputs with 7Ω output impedance
• Synchronous clock enable
• 35ps Maximum output skew
• 700ps Maximum part-to-part skew
• Green product and no Sb/Br