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| Quantity | Price (inc GST) |
|---|---|
| 1+ | CNY101.990 (CNY115.2487) |
| 10+ | CNY95.510 (CNY107.9263) |
| 25+ | CNY92.900 (CNY104.977) |
| 50+ | CNY90.600 (CNY102.378) |
| 100+ | CNY88.570 (CNY100.0841) |
| 250+ | CNY84.810 (CNY95.8353) |
Product Information
Product Overview
CY62167GE30-45ZXI is a CY62167GE30 high-performance CMOS, low-power (MoBL®) SRAM device with embedded ECC. The CY62167GE30 device includes an ERR pin that signals a single-bit error-detection and correction event during a read cycle. To access device with a single chip enable input, assert the chip enable (CE) input LOW. To access dual chip enable devices, assert both chip enable inputs CE1 as LOW and CE2 as HIGH. It has a unique byte power-down feature where, if both the Byte Enables (BHE and BLE) are disabled, the device seamlessly switch to the standby mode irrespective of the state of the chip enables, thereby saving power.
- Ultra-low standby current, typical standby current:1.5µA
- High speed: 45ns
- Embedded error-correcting code (ECC) for single-bit error correction
- Operating voltage range: 2.2V to 3.6V
- 1.0V data retention
- Transistor-transistor logic (TTL) compatible inputs and outputs
- Error indication (ERR) pin to indicate 1-bit error detection and correction
- 48-pin TSOP I package
- Industrial temperature range from –40°C to +85°C
- 2.2V to 3.6V voltage rating (VCC)
Technical Specifications
16Mbit
1Mword x 16bit
2.2V to 3.6V
TSOP-I
48Pins
45ns
3V
Surface Mount
85°C
-
Asynchronous SRAM
16Mbit
1Mword x 16bit
TSOP-I
3.6V
2.2V
-
-40°C
-
No SVHC (25-Jun-2025)
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate
