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| Packaging Type | Quantity | Unit Price: | Total |
|---|---|---|---|
| Cut Tape | 1 | CNY8.030 | CNY8.03 |
| Quantity | Price (inc GST) |
|---|---|
| 1+ | CNY8.030 (CNY9.0739) |
| 10+ | CNY5.250 (CNY5.9325) |
| 100+ | CNY5.180 (CNY5.8534) |
| 500+ | CNY5.080 (CNY5.7404) |
| 1000+ | CNY4.980 (CNY5.6274) |
| 2500+ | CNY4.870 (CNY5.5031) |
| 5000+ | CNY4.770 (CNY5.3901) |
Product Information
Product Overview
The TPS51206DSQT is a sink and source double date rate (DDR) Termination Regulator with VTTREF buffered reference output. It is specifically designed for low-input voltage and low-external component count systems where space is a key consideration. The device maintains fast transient response and only requires 1 x 10µF of ceramic output capacitance. The device supports a remote sensing function and all power requirements for DDR2, DDR3 and Low-Power DDR3 (DDR3L) VTT bus. The VTT current capability is ±2A peak. The device supports all of the DDR power states, putting VTT to High-Z in S3 state (suspend to RAM) and discharging VTT and VTTREF in S4/S5 state (suspend to disk).
- Supports 3.3V rail and 5V rail supply input voltage
- VTT + 0.4 to 3.5V VLDOIN input voltage range
- 0.5 to 0.9V Output voltage range
- 2A Peak sink and source current
- ±20mV Accuracy
- VTTREF Buffered reference - VDDQ/2 ±1% accuracy, 10mA sink/source current
- Overtemperature protection
- Green product and no Sb/Br
Applications
Industrial, Power Management
Technical Specifications
DDR2, DDR3, DDR3L, DDR4
3.1V
WSON
Surface Mount
105°C
MSL 2 - 1 year
2A
6.5V
10Pins
-40°C
-
Technical Docs (1)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Philippines
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate
